[{1 1}]

Apple's A-series smartphone processors have evolved from the A7 (28nm) to the A18 Pro (3nm), featuring more cores, transistors, and functionalities. According to Ben Bajarin, CEO and principal analyst of Creative Strategies, TSMC has increased its wafer pricing with each new node. The price of wafers has risen from $5,000 for 28nm wafers used in A7 processors to $18,000 for 3nm wafers powering the A17 and A18 series processors.

Ben Bajarin noted that as Apple’s A-series chips have advanced, the number of transistors has steadily increased—from 1 billion in the A7 to 20 billion in the A18 Pro. This trend is logical given the significant increase in cores and features. In 2013, the A7 featured two high-performance CPU cores and a quad-core GPU. By 2024, the A18 Pro incorporates two high-performance cores, four efficiency cores, a 16-core NPU, and a six-core GPU.

Apple’s A-series processors are designed for smartphones, and Bajarin highlighted that their chip sizes have remained relatively consistent across generations, ranging from 80 to 125 square millimeters. This consistency is due to TSMC’s advancements in process technology, which have steadily increased transistor density.

The most significant transistor density improvements occurred during earlier process transitions, such as from 28nm to 20nm and then to 16nm/14nm. However, recent processes (N5, N4P, N3B, N3E) have shown slower density improvements. The peak density improvements were observed with the A11 (N10, 10nm-class) and A12 (N7, 7nm-class) chips, with gains of 86% and 69%, respectively. More recent chips, including the A16 through A18 Pro, have experienced a noticeable slowdown in density improvements, primarily due to slower SRAM scaling.

Despite diminishing returns in density gains, Bajarin emphasized that production costs have surged. Wafer prices have climbed from $5,000 for the A7 to $18,000 for the A17 and A18 Pro, while the cost per square millimeter has risen from $0.07 to $0.25—a more than threefold increase over the past decade.

To make matters worse for Apple, performance improvements for the latest processors have also slowed (except for the A18 and M4 series), as achieving higher instructions per cycle (IPC) throughput with the latest architectures has become more challenging. Nevertheless, Apple has consistently managed to improve performance-per-watt with each generation.

Bajarin remarked: “With IPC gains becoming harder to achieve, maximizing efficiency is a viable strategy for performance-per-watt improvement, even as area-related costs increase.”

According to widely cited industry reports, TSMC sells not only functional wafers but also defective wafers to its customers. The number of chips produced per wafer depends on manufacturing yield—higher yields result in more chips per wafer, while lower yields mean fewer chips. Yield fluctuations significantly affect the cost-effectiveness of wafers for customers. However, TSMC strives to meet specific yield targets before starting production.

If actual yields drop significantly—by 10% to 15%, for instance—TSMC may offer financial compensation or discounts to affected customers. These measures are designed to reassure customers about the reliability and value of TSMC’s high-cost wafers.

As the alpha customer for TSMC’s latest processes, Apple is in a better position than other clients to fine-tune the manufacturing process, reducing defect density and improving yield. Additionally, rumors suggest that Apple is the only TSMC customer that pays per chip rather than per wafer. If true, this arrangement sets Apple apart from other TSMC customers.